MCU reverse engineering

Advanced Micro Devices, Inc. or AMD is an American multinational (fabless after GlobalFoundries was spun off in 2009) semiconductor company based in Sunnyvale, California, United States, that develops computer processors and related technologies for commercial and consumer markets. Its main products include microprocessors, motherboard chipsets, embedded processors and graphics processors for servers, workstations and personal computers, and embedded systems applications.

1. Classic Fuse-Link TTL PAL Series (One-Time Programmable)

1.1 Small Low-I/O PALs

PAL10H8, PAL10L8, PAL10P8

PAL12H6, PAL12L6, PAL12P6

PAL14H4, PAL14L4, PAL14P4

PAL16C1, PAL16H2, PAL16L2, PAL16P2

PAL16H4, PAL16L4, PAL16P4

PAL16H6, PAL16L6, PAL16P6

PAL16H8, PAL16L8, PAL16P8

PAL16R4, PAL16R6, PAL16R8

PAL16RP4, PAL16RP6, PAL16RP8

PAL16X4, PAL16X6, PAL16X8

1.2 Medium 24-Pin PALs

PAL18H4, PAL18L4, PAL18P4

PAL20C1, PAL20H2, PAL20L2, PAL20P2

PAL20R4, PAL20R6, PAL20R8

PAL20X4, PAL20X6, PAL20X8

PAL20S10

PAL22V10 (fuse-based original PAL22V10, non-erasable)

1.3 AmPAL High-Speed Advanced PAL Series

AmPAL16P8, AmPAL20L10, AmPAL22P10, AmPAL22XP1

1.4 Wide-Bus PAL Series

PAL32R16, PAL32X16

2. PALCE EE CMOS Electrically Erasable SPLD (5V Core, Reprogrammable)

2.1 PALCE16V8 Family (20-pin)

Base: PALCE16V8

High-speed variant: PALCE16V8H

Low-power variant: PALCE16V8Q

Ultra-low power: PALCE16V8Z

2.2 PALCE20V8 Family (24-pin)

Base: PALCE20V8

PALCE20V8H, PALCE20V8Q, PALCE20V8Z

2.3 PALCE22V10 Family (24-pin, versatile 10 macrocells)

Base: PALCE22V10

PALCE22V10H (high-speed standard power)

PALCE22V10Q (low quiescent power)

PALCE22V10Z (zero standby ultra-low power)

2.4 PALCE24V10 Family

PALCE24V10, PALCE24V10H, PALCE24V10Q

2.5 PALCE29M16 Large SPLD

PALCE29M16, PALCE29M16H, PALCE29M16Q

2.6 PALCE610 High-Density SPLD

PALCE610, PALCE610H

3. PALLV Low-Voltage 3.3V EE CMOS SPLD Series

Low-voltage 3.3V erasable PALs for battery & portable systems

PALLV16V8, PALLV16V8H, PALLV16V8Q

PALLV20V8, PALLV20V8H, PALLV20V8Q

PALLV22V10, PALLV22V10H, PALLV22V10Q

4. MACH Series AMD Vantis CPLDs (Multi-Macrocell Complex PLDs)

MACH devices are multi-array CPLDs with multiple PAL blocks, ISP-compatible

MACH 1 Family (Low-density CPLD)

MACH110, MACH120, MACH130, MACH140

MACH 2 Family (Mid-density CPLD)

MACH210, MACH220, MACH230, MACH240, MACH250, MACH260, MACH270, MACH280

MACH 3 Family (High-density CPLD)

MACH335, MACH345, MACH355, MACH365, MACH375, MACH385

MACH 4 / MACH 5 Large CPLDs

MACH435, MACH445, MACH455, MACH465

MACH510, MACH520, MACH530, MACH540, MACH550, MACH560

MACH LV Low-Voltage 3.3V CPLD Variants

MACH110LV, MACH120LV, MACH130LV, MACH140LV

MACH210LV ~ MACH280LV

MACH335LV ~ MACH385LV

MACH435LV ~ MACH465LV

MACH510LV ~ MACH560LV

5. AMD Post-Xilinx-Acquisition Adaptive PLD/FPGA Families (Modern AMD Programmable Logic)

After AMD acquired Xilinx in 2022, all Xilinx FPGA/CPLD/SoC products fall under AMD’s PLD/adaptive logic portfolio, including:

5.1 CPLD Legacy Lines (Former Xilinx)

XC9500, XC9500XL, XC9500XV

CoolRunner-II (XC2C000 series)

5.2 FPGA Families (Full Programmable Logic Arrays)

Spartan-II, Spartan-IIE, Spartan-3 / 3E / 3A / 3A DSP, Spartan-6, Spartan-7, Spartan UltraScale+

Virtex, Virtex-E, Virtex-II / Virtex-II Pro, Virtex-4, Virtex-5, Virtex-6, Virtex-7

Kintex UltraScale, Virtex UltraScale

Kintex UltraScale+, Artix UltraScale+, Virtex UltraScale+

5.3 Zynq All Programmable SoC (FPGA + ARM CPU)

Zynq-7000 (XC7Z series)

Zynq UltraScale+ MPSoC (ZU EG/EV/RFSoC series)

5.4 Versal ACAP (7nm Next-Gen Adaptive Compute PLD)

Versal Prime, Versal Premium, Versal AI Edge, Versal RF, Versal Automotive

5.5 Derivative Grades

XA (automotive AEC-Q100 qualified PLD/FPGA)

XCE (EasyPath cost-reduced production PLD/FPGA variants)

Introduction to AMD PALCE Series EE CMOS SPLDs

1. General Description

PALCE stands for Programmable Array Logic, Electrically Erasable CMOS, a family of single-chip simple programmable logic devices (SPLDs) developed by AMD’s Vantis programmable logic division. Unlike early one-time fuse-programmable PAL chips, PALCE adopts floating-gate electrically erasable CMOS technology, supporting repeated programming without ultraviolet light exposure. It follows the classic sum-of-products architecture (programmable AND array + fixed OR array), designed to replace discrete small-scale and medium-scale logic circuits to reduce PCB component count and simplify hardware design.

AMD transferred its PLD business to Vantis in the mid-1990s, and Vantis was fully acquired by Lattice Semiconductor in 1999. Lattice GAL series devices are fully pin-compatible functional drop-in replacements for AMD PALCE chips.

2. Suffix Definition & Device Variants

Each base PALCE model is divided into multiple power/speed variants identified by suffix letters:

1. No suffix: Original baseline generation, balanced timing and power, obsolete for new designs
2. H = High-Speed Standard Power: Fastest propagation delay, highest operating frequency, for high-speed industrial and bus applications
3. Q = Low Quiescent Current: Ultra-low static power consumption, limited fast speed grades, for battery-powered portable systems
4. Z = Zero Standby Ultra-Low Power: Microampere-level standby current for long-life battery equipment

Speed grade marking: -5, -7, -10, -15, -25, representing 5ns to 25ns signal propagation delay.

Full ordering part number template: PALCE[Model][Suffix]-[Speed][Package][Temperature]

3. Full PALCE Product Lineup

3.1 PALCE16V8 (20-pin, 8 output macrocells)

Entry-level universal PALCE, pin-for-pin compatible with GAL16V8; substitutes PAL16R8 series fuse PALs.

Variants: PALCE16V8, PALCE16V8H, PALCE16V8Q, PALCE16V8Z

3.2 PALCE20V8 (24-pin, 8 output macrocells)

24-pin mid-range device, compatible with GAL20V8, replaces PAL20R4/R6/R8.

Variants: PALCE20V8, PALCE20V8H, PALCE20V8Q, PALCE20V8Z

3.3 PALCE22V10 (24-pin flagship, 10 variable-term macrocells)

The most widely used PALCE flagship, featuring uneven product term distribution (8 to 16 product terms per macrocell) to implement complex multi-input Boolean logic. Supports PCI-compliant timing with -5/-7/-10 speed grades, maximum external frequency up to 142.8MHz.

Variants: PALCE22V10, PALCE22V10H, PALCE22V10Q, PALCE22V10Z

3.4 PALCE24V10

Expanded input resource model with 10 configurable macrocells for wide digital bus logic.

Variants: PALCE24V10, PALCE24V10H, PALCE24V10Q

3.5 PALCE29M16

High-density large SPLD with 16 macrocells for complex sequential and combinatorial logic integration.

Variants: PALCE29M16, PALCE29M16H, PALCE29M16Q

3.6 PALCE610

High-capacity wide AND array PALCE dedicated to complex decoding and arithmetic logic.

Variants: PALCE610, PALCE610H

4. Universal Core Architecture Features

All PALCE devices share identical fundamental hardware architecture:

1. CMOS input buffers with optional pull-up resistors, TTL/CMOS level compatible
2. Electrically erasable programmable AND matrix for custom product term generation
3. Fixed OR array to sum multiple product terms into output logic functions
4. Independent reconfigurable output macrocell per channel:
   1. Switchable combinatorial or registered flip-flop output
   2. Programmable active-high / active-low output polarity
5. Global shared control signals: common clock, asynchronous global reset, synchronous global preset
6. Built-in power-on automatic register reset to guarantee predictable startup state

5. Electrical Performance Comparison (H vs Q Variants)

Parameter	PALCExxVxxH High-Speed Version	PALCExxVxxQ Low-Power Version
Minimum tPD	5ns (-5 grade)	10ns (-10 grade)
Maximum fMAX	142.8MHz	100MHz
Typical Icc Static Current	90~140mA	~55mA
Available Speed Grades	-5/-7/-10/-15/-25	-10/-15/-25 only
Primary Application	High-speed PCI bus, industrial state machines	Battery-powered handheld test equipment

6. Application Fields

1. General-purpose glue logic: address decoders, multiplexers, signal comparators
2. Legacy computer hardware: motherboard interrupt control, bus arbitration, clock switching
3. Industrial automation: PLC sequential logic, motor control state machines
4. Portable battery-powered instruments (Q/Z low-power variants preferred)
5. PCI/ISA legacy digital interface circuits
6. Auxiliary logic matching FPGA and microcontroller systems
7. Military & aerospace equipment (industrial/military temperature grade H models)

 

AMD is the second-largest global supplier of microprocessors based on the x86 architecture and also one of the largest suppliers of graphics processing units. It also owns 8.6% of Spansion, a supplier of non-volatile flash memory.

AMD is the only significant rival to Intel in the central processor (CPU) market for (x86 based) personal computers. Since acquiring ATI in 2006, AMD and its competitor Nvidia have dominated the discrete graphics processor unit (GPU) market.

Corporate history

 

AMD headquarters in Sunnyvale, California

AMD campus in Markham, Ontario, Canada, formerly ATI headquarters

AMD's LEED-certified Lone Star campus in Austin, Texas
Advanced Micro Devices was founded on May 1, 1969,[7] by a group of former executives from Fairchild Semiconductor, including Jerry Sanders III, Ed Turney, John Carey, Sven Simonsen, Jack Gifford and three members from Gifford's team, Frank Botte, Jim Giles, and Larry Stenger. The company began as a producer of logic chips, then entered the RAM chip business in 1975. That same year, it introduced a reverse-engineered clone of the Intel 8080 microprocessor. During this period, AMD also designed and produced a series of bit-slice processor elements (Am2900, Am29116, Am293xx) which were used in various minicomputer designs.
During this time, AMD attempted to embrace the perceived shift towards RISC with their own AMD 29K processor, and also attempted to diversify into graphics and audio devices as well as EPROM memory. It had some success in the mid-1980s with the AMD7910 and AMD7911 "World Chip" FSK modem, one of the first multistandard devices that covered both Bell and CCITT tones at up to 1200 baud half duplex or 300/300 full duplex. The AMD 29K survived as an embedded processor and AMD spinoff Spansion continues to make flash memory. AMD decided to switch gears and concentrate solely on Intel-compatible microprocessors and flash memory, placing them in direct competition with Intel for x86-compatible processors and their flash memory secondary markets.
AMD announced the acquisition of ATI Technologies on July 24, 2006. AMD paid $4.3 billion in cash and 58 million shares of its stock, for a total of US$5.4 billion. The transaction completed on October 25, 2006.[8] Since 2010, all of the company's graphics processing products have been marketed under the AMD brand name.[9]
It was reported in December 2006 that AMD, along with its main rival in the graphics industry Nvidia, received subpoenas from the Justice Department regarding possible antitrust violations in the graphics card industry, including the act of fixing prices.[10]
In October 2008, AMD announced plans to spin off manufacturing operations in the form of a multibillion-dollar joint venture with Advanced Technology Investment Co., an investment company formed by the government of Abu Dhabi. The new venture is called GlobalFoundries Inc.. This partnership will allow AMD to focus solely on chip design.[11] The spin off was accompanied by the loss of approximately 1000 jobs, or about 10% of AMD's global workforce.[12]
In August 2011, AMD announced that former Lenovo executive Rory Read would be joining the company as CEO, following Dirk Meyer.[13]
To secure cost savings and support workforce revisions focused on the development of low-power computing hardware, AMD announced in November 2011 plans to lay off more than 10% (1400) of its employees from across all divisions worldwide.[12] This action was to have completed by Q1 2012 with most exits before Christmas 2011.[12] AMD announced in October 2012 plans to release an additional 15% of its workforce with an unspecified effective date to reduce costs in the face of declining sales revenue.[14]
AMD acquired the low-power server manufacturer SeaMicro in early 2012 as part of a strategy to regain lost market share in the server chip market.[15]
Processor market history

 

Early AMD 8080 Processor (AMD AM9080ADC / C8080A), 1977

AMD D8086, 1978
See also: List of AMD microprocessors
IBM PC and the x86 architecture
Main articles: Am286, Am386, Am486, and Am5x86
In February 1982, AMD signed a contract with Intel, becoming a licensed second-source manufacturer of 8086 and 8088 processors. IBM wanted to use the Intel 8088 in its IBM PC, but IBM's policy at the time was to require at least two sources for its chips. AMD later produced the Am286 under the same arrangement, but Intel canceled the agreement in 1986 and refused to convey technical details of the i386 part. AMD challenged Intel's decision to cancel the agreement and won in arbitration, but Intel disputed this decision. A long legal dispute followed, ending in 1994 when the Supreme Court of California sided with AMD. Subsequent legal disputes centered on whether AMD had legal rights to use derivatives of Intel's microcode. In the face of uncertainty, AMD was forced to develop clean room designed versions of Intel code.
In 1991, AMD released the Am386, its clone of the Intel 386 processor. It took less than a year for the company to sell a million units. Later, the Am486 was used by a number of large original equipment manufacturers, including Compaq, and proved popular. Another Am486-based product, the Am5x86, continued AMD's success as a low-price alternative. However, as product cycles shortened in the PC industry, the process of reverse engineering Intel's products became an ever less viable strategy for AMD.
K5, K6, Athlon, Duron, and Sempron
Main articles: AMD K5, AMD K6, Athlon, Duron, and Sempron
AMD's first in-house x86 processor was the K5, which was launched in 1996.[16] The "K" was a reference to Kryptonite. (In comic books, the only substance which could harm Superman was Kryptonite, which was formed from radioactive pieces of his home planet, Krypton. This is a reference to Intel's hegemony over the market, i.e, an anthropomorphization of them as Superman.[17]) The numeral "5" refers to the fifth processor generation, which Intel introduced as Pentium, because the US Trademark and Patent Office ruled that mere numbers could not be trademarked.
In 1996, AMD purchased NexGen, specifically for the rights to their Nx series of x86-compatible processors. AMD gave the NexGen design team their own building, left them alone, and gave them time and money to rework the Nx686. The result was the K6 processor, introduced in 1997. Although the K6 was based on Socket 7, variants such as K6-3/450 were faster than Intel's Pentium II (sixth generation processor).
The K7 was AMD's seventh-generation x86 processor, making its debut on June 23, 1999, under the brand name Athlon. Unlike previous AMD processors, it could not be used on the same motherboards as Intel's, due to licensing issues surrounding Intel's Slot 1 connector, and instead used a Slot A connector, referenced to the Alpha processor bus. The Duron was a lower-cost and limited version of the Athlon (64KB instead of 256KB L2 cache) in a 462-pin socketed PGA (socket A) or soldered directly onto the motherboard. Sempron was released as a lower-cost Athlon XP, replacing Duron in the socket A PGA era. It has since been migrated upward to all new sockets, up to AM3.
On October 9, 2001, the Athlon XP was released. On February 10, 2003, the Athlon XP with 512KB L2 Cache was released.[18]
Athlon 64, Opteron and Phenom
Main articles: Athlon 64, Opteron, and Phenom (processor)
The K8 was a major revision of the K7 architecture, with the most notable features being the addition of a 64-bit extension to the x86 instruction set (called x86-64, AMD64, or x64), the incorporation of an on-chip memory controller, and the implementation of an extremely high performance point-to-point interconnect called HyperTransport, as part of the Direct Connect Architecture. The technology was initially launched as the Opteron server-oriented processor on April 22, 2003.[19] Shortly thereafter it was incorporated into a product for desktop PCs, branded Athlon 64.[20]
On April 21, 2005, AMD released the first dual core Opteron, an x86-based server CPU.[21] A month later, AMD released the Athlon 64 X2, the first desktop-based dual core processor family.[22] In early May 2007, AMD had abandoned the string "64" in its dual-core desktop product branding, becoming Athlon X2, downplaying the significance of 64-bit computing in its processors. Upcoming updates involved some of the improvements to the microarchitecture, and a shift of target market from mainstream desktop systems to value dual-core desktop systems. In 2008, AMD started to release dual-core Sempron processors exclusively in China, branded as the Sempron 2000 series, with lower HyperTransport speed and smaller L2 cache. Thus AMD completed its dual-core product portfolio for each market segment.
After K8 came K10. On September 10, 2007, AMD released the first K10 processors: nine quad-core Third Generation Opteron processors. This was followed by the Phenom processor for desktop. K10 processors came in dual-core, triple-core,[23] and quad-core versions, with all cores on a single die. AMD released a new platform, codenamed "Spider", which utilized the new Phenom processor, as well as an R770 GPU and a 790 GX/FX chipset from the AMD 700 chipset series. However, AMD built the Spider at 65nm, which was uncompetitive with Intel's smaller and more power-efficient 45nm.
In January 2009, AMD released a new processor line dubbed Phenom II, a refresh of the original Phenom built using the 45 nm process. AMD's new platform, codenamed “Dragon”, utilised the new Phenom II processor, and an ATI R770 GPU from the R700 GPU family, as well as a 790 GX/FX chipset from the AMD 700 chipset series. The Phenom II came in dual-core, triple-core and quad-core variants, all using the same die, with cores disabled for the triple-core and dual-core versions. The Phenom II resolved issues that the original Phenom had, including low clock speed, a small L3 cache and a Cool'n'Quiet bug that decreased performance. The Phenom II was price and performance-competitive with Intel's mid-to-high-range Core 2 Quads. The Phenom II also enhanced the Phenom's memory controller, allowing it to use DDR3 in a new native socket AM3, while maintaining backwards compatibility with AM2+, the socket used for the Phenom, and allowing the use of the DDR2 memory that was used with the platform.
In April 2010, AMD released a new Phenom II hexa-core (6-core) processor codenamed "Thuban". This was a totally new die based on the hexa-core “Istanbul” Opteron processor. It included AMD's “turbo core” technology, which allows the processor to automatically switch from 6 cores to 3 faster cores when more pure speed is needed. AMD's Enthusiast platform, codenamed “Leo”, utilized the new Phenom II, a new chipset from the AMD 800 chipset series and an ATI “Cypress” GPU from the Evergreen (GPU family) GPU series.
The Magny Cours and Lisbon server parts were released in 2010.[dated info] The Magny Cours part came in 8 to 12 cores and the Lisbon part came in 4 and 6 core parts. Magny Cours is focused on performance while the Lisbon part is focused on high performance per watt. Magny Cours is an MCM (Multi-Chip Module) with two hexa-core “Istanbul” Opteron parts. This will use a new G34 socket for dual and quad socket processors and thus will be marketed as Opteron 61xx series processors. Lisbon uses C32 socket certified for dual socket use or single socket use only and thus will be marketed as Opteron 41xx processors. Both will be built on a 45 nm SOI process.
Fusion, Bobcat, Bulldozer, and Vishera
Main articles: AMD Accelerated Processing Unit, Bulldozer (processor), and Bobcat (processor)
After the merger between AMD and ATI, an initiative codenamed Fusion was announced that will merge a CPU and GPU on some of their mainstream chips, including a minimum 16 lane PCI Express link to accommodate external PCI Express peripherals, thereby eliminating the requirement of a northbridge chip completely from the motherboard. The initiative will see some of the processing originally done on the CPU (e.g. floating-point unit operations) moved to the GPU, which is better optimized for calculations such as floating-point unit calculations. This is referred to by AMD as an accelerated processing unit (APU).[24]
Llano is to be the second APU released,[25] targeted at the mainstream market.[24] This will incorporate a CPU and GPU on the same die, as well as the northbridge functions, and labeled on AMD's new timeline as using "Socket FM1" with DDR3 memory. This will, however, not be based on the new bulldozer core and will in fact be similar to the current Phenom II "Deneb" processor serving as AMD's high-end processor until the release of the new 32 nm parts. On September 28, 2011, AMD said that the third quarter of 2011 won't have a 10% revenue increase as AMD planned before, because of the manufacturing problem with the 32 nm Llano Fusion chips.[26]
Bulldozer is Advanced Micro Devices' (AMD) CPU codename for the second latest server and desktop processors released on October 12, 2011. This family 15h microarchitecture is the successor to the family 10h (K10) microarchitecture M-SPACE design methodology.
Bulldozer is designed from scratch, not a development of earlier processors.[27] The core is specifically aimed at 10-125 watt TDP computing products. AMD claims dramatic performance-per-watt efficiency improvements in high-performance computing (HPC) applications with Bulldozer cores.
Vishera is AMD's latest processor series
Bobcat is the latest x86 processor core from AMD aimed at low-power/low-cost market.
It was revealed during a speech from AMD executive vice-president Henri Richard in Computex 2007 and was put into production Q1 2011.[25] One of the major supporters was executive vice-president Mario A. Rivas who felt it was difficult to compete in the x86 market with a single core optimized for the 10-100 Watts range and actively promoted the development of the simpler core with a target range of 1-10 Watts. In addition, it was believed that the core could migrate into the hand-held space if the power consumption can be reduced to less than 1 W.
ARM architecture-based chip fib & sem lab sertvice maker together club snaileye
AMD intends to release an ARM chip in 2014 for use in servers as a low-power alternative to current x86 chips as part of a strategy to regain lost market share in the server chip business.